Stuart A Berke

7499286, Mar 3, 2009

Aug 31, 2006

11/513807

Stuart Allen Berke - Austin TX,
Jeffrey Michael Lewis - Maynard MA,

Hewlett-Packard Development Company, L.P. - Houston TX

H05K 5/00

361756, 361686, 361727, 361790

A mounting adapter for inserting one or more electronic modules in a system is disclosed. The mounting adapter includes a sleeve having first and second portions that are each configured to receive an electronic module. The sleeve also includes a dividing member that cooperates with the first and second portions to define at least two volumes for receipt of electronic modules. Additionally, the sleeve is configured for insertion in a slot of a receptacle that is configured to receive an electronic module larger than the electronic modules the sleeve is designed to receive.

20120198263, Aug 2, 2012

Feb 1, 2011

13/019099

Stuart Allen Berke - Austin TX,
Mukund P. Khatri - Austin TX,

G06F 1/26

713340

In accordance with the present disclosure, a system and method for creating and dynamically maintaining power inventories of an information handling system is presented. A system for creating and dynamically maintaining power inventories of an information handling system may include a memory and a processor. The processor may be operable to generate power inventories for the information handling system and save the power inventories in the memory. Each of the power inventories may correspond to one of the power states of the information handling system. The processor may also be operable to dynamically update each of the saved power inventories in response to changes in the information handling system.

20060161718, Jul 20, 2006

Jan 20, 2005

11/039308

Stuart Berke - Austin TX,
Mark Shaw - Garland TX,

G06F 13/00

710317000

A system and method for communicatively coupling a plurality of processor groups residing in a symmetric multiprocessing (SMP) system. One embodiment of a non-uniform crossbar switch plane multiprocessing (SMP) system comprises a plurality of processor groups and a non-uniform crossbar switch plane system comprising a plurality of routes, such that each of the processor groups are coupled to the other processor groups by a number of routes at most equal to (N-1), where N equals the number of processor groups.

20060294317, Dec 28, 2006

Jun 22, 2005

11/158419

Stuart Berke - Austin TX,

G06F 13/28

711141000

A symmetric multiprocessor (“SMP”) computer architecture with interchangeable processor and input/output (“IO”) modules is disclosed. In one embodiment, the computer comprises a circuit board to interconnect processor modules and IO modules that are interchangeable with each other. Each of the interchangeable modules includes a portion of a cache-coherent system memory.

20070081315, Apr 12, 2007

Aug 29, 2005

11/214075

Robert Mondor - Sutton MA,
Jeffrey Lewis - Maynard MA,
Stuart Berke - Austin TX,

H01R 12/16

361788000

An enclosure for an input-output (IO) subsystem comprises: a backplane; a plurality of first slots for accepting corresponding IO option modules; a second slot for accepting an IO controller module; a plurality of first connectors corresponding to the plurality of first slots for connecting the corresponding IO option modules to the backplane; a second connector corresponding to the second slot for connecting the IO controller module to the backplane; and wherein the backplane includes communication links for interconnecting the second connector to each of the plurality of first connectors.

20070226456, Sep 27, 2007

Mar 21, 2006

11/386026

Mark Shaw - Richardson TX,
Stuart Berke - Austin TX,
Denis Foley - Shrewsbury MA,

G06F 15/00

712010000

There is provided a system and a method for employing multiple processors in a computer system. More specifically, there is provided a computer system comprising a first cell board including a first central processing unit, a second central processing unit, and a first data agent coupled to the first and second central processing units and configured to transmit signals from the first and second central processing units to a first crossbar circuit. There is also provided a second cell board including a third central processing unit coupled to the first central processing unit via a point-to-point data link, a fourth central processing unit, and a second data agent coupled to the third and fourth central processing units and configured to transmit signals from the third and fourth central processing units to a second crossbar circuit.

20080278905, Nov 13, 2008

May 9, 2007

11/746143

Paul T. Artman - Austin TX,
Stuart A. Berke - Austin TX,

DELL PRODUCTS, LP - Round Rock TX

H05K 7/20

361685, 361687

An information handling system can include a fan control module operable to be control a fan to cool components within a housing. The fan control module can include a communication module operable to receive configuration information associated with components disposed within a housing of an information handling system. The fan control module can also include a processor operable to determine a fan control signal using the configuration information. In particular embodiments, the fan control module can determine an idling speed that reflects the actual configuration of the information handling system.

20100035461, Feb 11, 2010

Aug 7, 2008

12/187513

Stuart Allen Berke - Austin TX,

H01R 3/00

439489

Presence of a module, such as a DIMM, in an information handling system is detected by selectively altering the function of socket pins at opposing ends of the module socket for use in detection of module pins in contact with the socket pins. For example, ground pins at opposing ends of the socket are selectively interfaced with a detection circuit that applies a voltage through a pull up resistor to generate a logic high if the ground pin is not connected to a module ground pin and a logic low if the ground pin is connected to a module ground pin. Presence detection at opposing ends of the module identifies partially inserted modules where one end indicates a ground pin interface while the opposing end does not.