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Milind Shah Phones & Addresses

  • San Diego, CA
  • 2435 Retriever Ct, Greensboro, NC 27455 (336) 545-7920
  • 1921 New Garden Rd, Greensboro, NC 27410 (336) 545-7920
  • 3844 Battleground Ave, Greensboro, NC 27410 (336) 282-8293
  • 3901 Battleground Ave, Greensboro, NC 27410 (336) 286-6550
  • Memphis, TN
  • Jamestown, NC
  • Miami, FL
  • 11303 Carmel Creek Rd, San Diego, CA 92130 (336) 392-5499

Work

Position: Professional/Technical

Education

Degree: Associate degree or higher

Professional Records

Medicine Doctors

Milind Shah Photo 1

Milind S. Shah

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Specialties:
Cardiovascular Disease, Interventional Cardiology
Work:
Marshfield ClinicMarshfield Clinic Marshfield Center
1000 N Oak Ave, Marshfield, WI 54449
(715) 387-5511 (phone), (715) 387-5754 (fax)

Marshfield ClinicMarshfield Clinic Stevens Point
4100 State Hwy 66, Stevens Point, WI 54482
(715) 343-7700 (phone), (715) 343-7788 (fax)
Education:
Medical School
N H L Municipal Med Coll, Gujarat Univ, Ahmedabad, Gujarat, India
Graduated: 1984
Procedures:
Angioplasty
Cardiac Rehabilitation
Pacemaker and Defibrillator Procedures
Cardioversion
Conditions:
Ischemic Heart Disease
Acute Myocardial Infarction (AMI)
Angina Pectoris
Aortic Regurgitation
Aortic Valvular Disease
Languages:
Chinese
English
French
Spanish
Description:
Dr. Shah graduated from the N H L Municipal Med Coll, Gujarat Univ, Ahmedabad, Gujarat, India in 1984. He works in Stevens Point, WI and 1 other location and specializes in Cardiovascular Disease and Interventional Cardiology. Dr. Shah is affiliated with Ministry Saint Michaels Hospital and Ministry St Josephs Hospital.
Milind Shah Photo 2

Milind Narendra Shah

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Specialties:
Internal Medicine
Preventive Medicine
Occupational Medicine
General Preventive Medicine
Education:
UMDNJ (1999)

Resumes

Resumes

Milind Shah Photo 3

Storage Engineer - Team Lead At Blue Cross Blue Shield Association

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Position:
Storage Analayst III at Blue Cross Blue Shield Association
Location:
Chicago, Illinois
Industry:
Information Technology and Services
Work:
Blue Cross Blue Shield Association - chicago, IL since Jun 2008
Storage Analayst III

Ace Hardware Sep 2004 - Jun 2008
System Engineer

Infinity Consulting Group Mar 2004 - Sep 2004
Network Administrator
Education:
Northern Illinois University 1999 - 2004
BS, Computer Science
Lincoln Way Central 1999 - 2000
High school Diploma
Skills:
Storage Solutions
Storage Area Networks
Storage Management
Storage Architecture
Storage Virtualization
IBM Storage
Hitachi
NetApp Filers
EMC
Brocade
Quantum
Netbackup
Tivoli
Encryption
Deduplication
Compression
AIX
Solaris
Red Hat Linux
Windows Server
High Availability
Active Directory
NAS
SAN
Tape Libraries
LDAP
Group Policy
Security
VMware
VMware ESX
VMware Infrastructure
Platespin
P2V
Technical Architecture
Project Planning
Project Implementation
Project Engineering
Data Center Architecture
Data Center Relocation
Data Center
Honor & Awards:
The Quality Individual Award: Ace Hardware Corporation. (Feb 26, 2008) David O’Donnell Helpful Hardware Award: Ace Hardware Corporation. (Jan 29, 2007)
Languages:
Hindi
Gujarati
Marathi
Milind Shah Photo 4

Milind Shah

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Location:
United States
Education:
Northern Illinois University 2000 - 2004
Bachelors in science, Coputer Science
Milind Shah Photo 5

Director, Content Management And Contractor Operations At About.com

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Position:
DIRECTOR, Content Management and Contractor Operations at About.com
Location:
New York, New York
Industry:
Internet
Work:
About.com - New York, NY since Jul 2011
DIRECTOR, Content Management and Contractor Operations

Vital Business Media Jun 2009 - Oct 2010
DIRECTOR, Product Development

Penton Media Oct 2007 - 2009
MANAGER, Product Development, Websites and Social Media

Lymphoma Research Foundation Jun 2006 - Mar 2007
MANAGER, Information Technology

Spence-Chapin Jul 2002 - Apr 2006
MANAGER, Information Systems
Skills:
Wordpress
Drupal
HTML + CSS
PHP
Google Analytics
Omniture
OpenX
DFP
HTML
Publishing
User Experience
Languages:
Gujarati
Milind Shah Photo 6

Milind Shah

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Location:
Greater San Diego Area
Industry:
Semiconductors
Milind Shah Photo 7

Milind Shah

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Location:
United States
Milind Shah Photo 8

Milind Shah

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Location:
United States

Publications

Us Patents

Circuit Board Embedded Inductor

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US Patent:
6996892, Feb 14, 2006
Filed:
Mar 24, 2005
Appl. No.:
11/089297
Inventors:
David Dening - Stokesdale NC,
Steve Dorn - Eden NC,
Milind Shah - Greensboro NC,
Yang Rao - Colfax NC,
Michael Kay - Summerfield NC,
Jon Jorgenson - Greensboro NC,
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H01F 7/06
US Classification:
296021, 438 3, 336200
Abstract:
A circuit board having an embedded inductor and a process for making the circuit board is provided. In general, the process begins by providing a core structure including a dielectric core layer and a first metal layer on a top surface of the dielectric core layer. The first metal layer is etched to form first inductor windings. A material, such as an epoxy material, including magnetic filler material is deposited over the first inductor windings. Thereafter, a prepreg layer is placed over and attached to the material deposited over the first inductor windings to form the circuit board having the embedded inductor.

Embedded Passive Components

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US Patent:
2005017, Aug 11, 2005
Filed:
Feb 14, 2003
Appl. No.:
10/366924
Inventors:
Jon Jorgenson - Greensboro NC,
Milind Shah - Greensboro NC,
Victor Steel - Oak Ridge NC,
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H01L021/20
G06F017/50
H01L029/00
US Classification:
438381000, 716001000, 257528000
Abstract:
The present invention embeds passive components within a multilayer substrate used for mounting integrated circuits and other electronic components to form an electronic module or circuit board. During construction of the multilayer substrate, passive components are attached to an inside surface of a metallic foil layer. The inside surface of the metallic foil layer is then laminated to another metallic foil layer, such that the foil layers are parallel to but separated from each other. As such, the passive component is embedded within the multilayer substrate. Contacts are formed for the passive component by etching away portions of the foil layer on which the passive component resides. Electrical connections can be routed in the foil to effectively couple the passive component to a circuit formed on the multilayer substrate as desired. The embedded passive components can take various forms, such as capacitors, inductors, and resistors.

Radio Frequency Package On Package Circuit

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US Patent:
2013012, May 16, 2013
Filed:
Nov 14, 2012
Appl. No.:
13/677054
Inventors:
Gurkanwal Singh Sahota - San Diego CA,
Steven C Ciccarelli - San Diego CA,
David J Wilding - San Diego CA,
Ryan D Lane - San Diego CA,
Christian Holenstein - La Mesa CA,
Milind P Shah - San Diego CA,
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
H05K 3/36
H05K 13/04
H04B 1/40
US Classification:
455 902, 29830, 29738
Abstract:
A radio frequency package on package (PoP) circuit is described. The radio frequency package on package (PoP) circuit includes a first radio frequency package. The first radio frequency package includes radio frequency components. The radio frequency package on package (PoP) circuit also includes a second radio frequency package. The second radio frequency package includes radio frequency components. The first radio frequency package and the second radio frequency package are in a vertical configuration. The radio frequency components on the first radio frequency package are designed to reduce the effects of ground inductance.

Selective Seed Layer Treatment For Feature Plating

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US Patent:
2012013, Jun 7, 2012
Filed:
Dec 2, 2010
Appl. No.:
12/958638
Inventors:
Omar J. Bchir - San Diego CA,
Milind P. Shah - San Diego CA,
Sashidhar Movva - San Diego CA,
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
H01L 23/485
H01L 21/283
US Classification:
257750, 438652, 257774, 257E21159, 257E23019
Abstract:
Conventional metallization processes fail at high density or small feature size patterns. For example, during patterning dry films may collapse or lift-off resulting in short circuits or open circuits in the metallization pattern. An exemplary method for metallization of integrated circuits includes forming features such as trenches, pads, and planes in a dielectric layer and depositing and selectively treating a seed layer in desired features of the dielectric layer. The treated regions of the seed layer may be used as a seed for electroless deposition of conductive material, such as copper, into the features. When the seed layer is a catalytic ink, the seed layer may be treated by curing the catalytic ink with a laser.

Method And Apparatus For Improving Substrate Warpage

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US Patent:
2012009, Apr 19, 2012
Filed:
Jul 15, 2011
Appl. No.:
13/183875
Inventors:
Omar J. Bchir - San Diego CA,
Milind P. Shah - San Diego CA,
Sashidhar Movva - San Diego CA,
Assignee:
QUALCOMM INCORPORATED - San Diego CA
International Classification:
H05K 1/00
H05K 3/00
US Classification:
174258, 29829
Abstract:
A package substrate includes conductive layers and a dielectric interposed between the conductive layers. The dielectric includes a stiffening material component and a neat resin doped with a negative coefficient of thermal expansion (CTE) fiber.

Electronic Package And Method Of Making An Electronic Package

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US Patent:
2012008, Apr 5, 2012
Filed:
Aug 30, 2011
Appl. No.:
13/220733
Inventors:
Milind P. Shah - San Diego CA,
Omar J. Bchir - San Diego CA,
Sashidhar Movva - San Diego CA,
Assignee:
QUALCOMM INCORPORATED - San Diego CA
International Classification:
H01L 23/498
H01L 21/56
H01L 23/48
US Classification:
257737, 257777, 438127, 257E23068, 257E2301, 257E21502
Abstract:
An electrical package and a method of forming the electrical package, where the electrical package has a substrate with a frontside, an intergrated circuit coupled to the frontside of the substrate, and at least one non-collapsible metal connector created on the frontside of the first substrate.

Process For Improving Package Warpage And Connection Reliability Through Use Of A Backside Mold Configuration (Bsmc)

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US Patent:
2011028, Nov 24, 2011
Filed:
Sep 15, 2010
Appl. No.:
12/882525
Inventors:
Omar J. Bchir - San Diego CA,
Milind P. Shah - San Diego CA,
Sashidhar Movva - San Diego CA,
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
H01L 23/48
H01L 21/50
US Classification:
257773, 438125, 257E21499, 257E2301
Abstract:
A backside mold configuration (BSMC) process for manufacturing packaged integrated circuits includes applying a mold compound to a side of a packaging substrate opposite an attached die. The mold compound is deposited on a dielectric (such as photo resist). The mold compound and dielectric are patterned after coupling a die to the packaging substrate to expose a contact pad of the packaging substrate. After patterning the mold compound and dielectric, a packaging connection is coupled to contact pads through the mold compound and dielectric. The mold compound surrounding the packaging connection reduces warpage of the packaging substrate during processing. Additionally, patterning the dielectric after attaching the die improves reliability of the packaging connection.

Microelectromechanical Systems Embedded In A Substrate

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US Patent:
2011018, Jul 28, 2011
Filed:
Jan 28, 2010
Appl. No.:
12/695543
Inventors:
Milind P. Shah - San Diego CA,
Mario Francisco Velez - San Diego CA,
Fifin Sweeney - San Diego CA,
Assignee:
QUALCOMM INCORPORATED - San Diego CA
International Classification:
H01L 23/12
H01L 21/58
US Classification:
257723, 438126, 257E23003, 257E21505
Abstract:
An integrated circuit package includes a microelectromechanical systems (MEMS) device embedded in a packaging substrate. The MEMS device is located on a die embedded in the packaging substrate and covered by a hermetic seal. Low-stress material in the packaging substrate surrounds the MEMS device. Additionally, interconnects may be used as standoffs to reduce stress on the MEMS device. The MEMS device is embedded a distance into the packaging substrate leaving for example, 30-80 microns, between the hermetic seal of the MEMS device and the support surface of the packaging substrate. Embedding the MEMS device results in lower stress on the MEMS device.
Milind P Shah from San Diego, CA, age ~47 Get Report